Variable frequency write pattern generation

Abstract

In some implementations, a system includes a magnetic media disk and a read/write unit. The read/write unit includes a plurality of phase-locked loops (PLLs), an interpolator unit, a delay-locked loop, and a precompensation unit. The PLLs are configured to generate, using a reference clock signal, a first plurality of clock signals having different frequencies phases. The interpolator unit is configured to interpolate the first plurality of clock signals in accordance with a frequency offset signal to generate a single-phase clock signal. The delay-locked loop is configured to delay the single-phase clock signal in accordance with a PLL data clock signal to generate a second plurality of clock signals having different phases. The precompensation unit is configured to apply precompensation to the second plurality of clock signals to generate a timing signal for writing data to the magnetic media disk.