The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2018
Filed:
Oct. 26, 2017
Perceptia Devices, Inc., Scotts Valley, CA (US);
Julian Jenkins, Kurraba Point, AU;
André Henri Grouwstra, Morgan Hill, CA (US);
Perceptia Devices, Inc., Morgan Hill, CA (US);
Abstract
A phase-locked loop (PLL) has at least two parallel loops. The loops share an oscillator, a counter connected with the oscillator, a multiplexer, and a loop filter. Each loop has a register sampling the oscillator phase from the counter, and a phase predictor which uses a fractional-N frequency control word (FCW) to calculate a predicted phase as an integer number. The loop forwards the integer difference between the sampled phase and the predicted phase to the multiplexer, which selects one of the loops and provides the difference to the loop filter. Loops that are not selected use a monitor-and-adjust function to keep the difference in track with the difference of a selected loop. Loops may provide a loop sleep function and the PLL may also provide an oscillator sleep function.