The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 28, 2018

Filed:

Dec. 30, 2015
Applicant:

Silicon Laboratories Inc., Austin, TX (US);

Inventor:

Jeremy C. Smith, Austin, TX (US);

Assignee:

Silicon Laboratories Inc., Austin, TX (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H01L 27/02 (2006.01); H01L 29/739 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); H01L 27/0259 (2013.01); H01L 27/0266 (2013.01); H01L 27/0292 (2013.01); H01L 29/7393 (2013.01); H02H 9/044 (2013.01);
Abstract

Circuit configurations and related methods are provided that may be implemented using insulated-gate bipolar transistor (IGBT) device circuitry to protect at risk circuitry (e.g., such as high voltage output buffer circuitry or any other circuitry subject to undesirable ESD events) from damage due to ESD events that may occur during system assembly. The magnitude of the trigger voltage Vthreshold for an IGBT ESD protection device may be dynamically controlled between at least two different values so that trigger voltage Vthreshold for an IGBT ESD protection device may be selectively reduced when needed to better enable ESD operation.


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