The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2018
Filed:
Jun. 03, 2016
Samsung Display Co., Ltd., Yongin-si, Gyeonggi-do, KR;
Ji-Su Na, Yongin-si, KR;
Kyoung-Jin Park, Guri-si, KR;
Samsung Display Co., Ltd., Yongin-si, KR;
Abstract
A pixel circuit includes a first-transistor including gate-electrode receiving first emission control signal, first-electrode connected to ELVDD, and second-electrode connected to first node, a second-transistor including gate-electrode receiving second emission control signal, first-electrode, and second-electrode connected to second node, a third-transistor including gate-electrode connected to third node, first-electrode connected to first node, and second-electrode connected to first-electrode of the second-transistor, an OLED including anode connected to second node and cathode connected to ELVSS, a fourth-transistor including gate-electrode receiving bias scan signal, first-electrode connected to initialization voltage, and second-electrode connected to second node, a fifth-transistor including gate-electrode receiving bias scan signal, first-electrode connected to reference voltage, and second-electrode connected to third node, a sixth-transistor including gate-electrode receiving data scan signal, first-electrode receiving data signal, and second-electrode connected to third node, a storage-capacitor between first node and third node, and a hold-capacitor between ELVDD and first node.