The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 28, 2018
Filed:
Dec. 26, 2017
International Business Machines Corporation, Armonk, NY (US);
William V. Huott, Holmes, NY (US);
Kevin M. McIvain, Delmar, NY (US);
Samir K. Patel, Wappingers Falls, NY (US);
Gary A. Van Huben, Poughkeepsie, NY (US);
INTERNATIONAL BUSINESS MACHINES CORPORATION, Armonk, NY (US);
Abstract
A method for fabricating a circuit comprises identifying a target on the circuit with a transitional sensitivity, determining a test pattern that stresses the target, generating a verification model at the hierarchy of the target, creating a pattern and translating the pattern into a verification assertion, running the verification with the translated pattern, determining whether the verification assertion is a possible verification assertion following the running of the verification, obtaining a state of source laches and pin inputs responsive to determining that the formal verification assertion is a possible verification assertion following the running of the formal verification, translating the formal verification assertion into a coverage event, running a simulation with the coverage event, determining whether the coverage event occurred, and creating a manufacturing test responsive to determining that the coverage event occurred.