The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Apr. 27, 2011
Applicants:

Marcus Granger-jones, Scotts Valley, CA (US);

Christian Rye Iversen, Vestbjerg, DK;

Inventors:

Marcus Granger-Jones, Scotts Valley, CA (US);

Christian Rye Iversen, Vestbjerg, DK;

Assignee:

Qorvo US, Inc., Greensboro, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K 17/10 (2006.01); H03K 17/687 (2006.01); H03K 17/693 (2006.01);
U.S. Cl.
CPC ...
H03K 17/102 (2013.01);
Abstract

Described are embodiments of stacked field effect transistor (FET) switch having a plurality of FET devices coupled in series to form an FET device stack. To prevent the FET device stack from being turned on during large signal conditions, a first decoupling path and a second decoupling path are provided for the first FET device and the last FET device in the FET device stack. Both decoupling paths are configured to pass a time-variant input signal during the open state. The first decoupling path may be coupled from the drain contact of the first FET device to the gate contact or the source contact. The second decoupling path may be coupled from the source contact of the last FET device to the gate contact or drain contact. The time-variant input signal bypasses the FET device stack through the first and second decoupling paths during the open state.


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