The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Feb. 28, 2018
Applicant:

Bae Systems Information and Electronic Systems Integration Inc., Nashua, NH (US);

Inventors:

Mark E. Stuenkel, Goffstown, NH (US);

Lawrence J. Kushner, Andover, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/66 (2006.01); H03K 5/156 (2006.01); H03K 5/159 (2006.01);
U.S. Cl.
CPC ...
H03K 5/1565 (2013.01); H03M 1/662 (2013.01); H03K 5/159 (2013.01);
Abstract

A duty cycle adjustment circuit includes: a delay circuit to delay an input clock signal to produce a delayed clock signal having a rising edge partially overlapping the rising edge of the input clock signal, the input clock signal oscillating between first and second values about a midpoint value; a blender circuit to blend the input clock signal and the delayed clock signal to produce a blended clock signal; a buffer circuit to buffer the input clock signal for an amount of time comparable to the blender circuit, to produce a buffered clock signal; and a combiner circuit to combine the buffered and the blended clock signals to produce an output clock signal that transitions to or remains at the first value when both the buffered and blended clock signals are on the first value side of the midpoint value, and otherwise transitions to or remains at the second value.


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