The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Mar. 29, 2017
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Taewoo Kwak, San Diego, CA (US);

Joseph Rutkowski, Chandler, AZ (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 1/34 (2006.01); H03F 3/45 (2006.01); H03F 1/02 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45076 (2013.01); H03F 1/0233 (2013.01); H03F 3/45071 (2013.01); H03F 3/45183 (2013.01); H03F 2203/45116 (2013.01); H03F 2203/45526 (2013.01);
Abstract

A loop compensation circuit includes a differential difference amplifier having a first transconductance stage with a first input terminal and a second input terminal. The first input terminal is coupled to a voltage reference and the second input terminal is coupled to a feedback node. The amplifier also includes a second transconductance stage having a third input terminal and a fourth input terminal. The third input terminal is coupled to a virtually specified fixed voltage and the fourth input terminal is coupled to a fixed specified voltage. The loop compensation circuit also includes a feedback impedance coupled between an output of the differential difference amplifier and the third input terminal and a second impedance between the third input terminal and the fixed specified voltage.


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