The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2018
Filed:
Mar. 24, 2016
Applicant:
Globalfoundries Inc., Grand Cayman, KY;
Inventors:
Shesh Mani Pandey, Saratoga Springs, NY (US);
Pei Zhao, Clifton Park, NY (US);
Zhenyu Hu, Clifton Park, NY (US);
Assignee:
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/78 (2006.01); H01L 29/66 (2006.01); H01L 29/08 (2006.01); H01L 29/161 (2006.01); H01L 29/16 (2006.01); H01L 29/165 (2006.01); H01L 29/24 (2006.01); H01L 29/267 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7848 (2013.01); H01L 29/0847 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/1608 (2013.01); H01L 29/24 (2013.01); H01L 29/267 (2013.01); H01L 29/66545 (2013.01); H01L 29/66818 (2013.01); H01L 29/7851 (2013.01);
Abstract
Methods to reduce a width of a channel region of Si fins and the resulting devices are disclosed. Embodiments include forming a Si fin in a Si layer; forming a channel region over the Si fin including a dummy gate with a spacer on each side; forming S/D regions at opposite ends of the Si fin; removing the dummy gate, forming a cavity; thinning sidewalls of the Si fin; and forming a high-k/metal gate in the cavity.