The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Nov. 30, 2016
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Takeshi Kamino, Kanagawa, JP;

Yotaro Goto, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 21/265 (2006.01); H01L 29/66 (2006.01); H01L 21/311 (2006.01);
U.S. Cl.
CPC ...
H01L 27/14643 (2013.01); H01L 21/265 (2013.01); H01L 21/31116 (2013.01); H01L 27/1461 (2013.01); H01L 27/1462 (2013.01); H01L 27/14605 (2013.01); H01L 27/14607 (2013.01); H01L 27/14612 (2013.01); H01L 27/14614 (2013.01); H01L 27/14689 (2013.01); H01L 29/6659 (2013.01); H01L 29/66568 (2013.01); H01L 21/26513 (2013.01); H01L 21/26586 (2013.01);
Abstract

Provided is a semiconductor device with improved performance. The semiconductor device includes a photodiode having a charge storage layer (n-type semiconductor region) and a surface layer (p-type semiconductor region), and a transfer transistor having a gate electrode and a floating diffusion. The surface layer (p-type semiconductor region) of a second conductive type formed over the charge storage layer (n-type semiconductor region) of a first conductive type includes a first sub-region having a low impurity concentration, and a second sub-region having a high impurity concentration. The first sub-region is arranged closer to the floating diffusion than the second sub-region.


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