The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Apr. 24, 2014
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Kazuyuki Nakagawa, Tokyo, JP;

Shinji Baba, Tokyo, JP;

Takeumi Kato, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/498 (2006.01); H01L 25/00 (2006.01); H05K 3/46 (2006.01); H01L 21/56 (2006.01); H01L 21/66 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 23/66 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); H01L 21/56 (2013.01); H01L 22/14 (2013.01); H01L 23/3128 (2013.01); H01L 23/3675 (2013.01); H01L 23/49816 (2013.01); H01L 23/49822 (2013.01); H01L 23/49827 (2013.01); H01L 23/66 (2013.01); H01L 24/49 (2013.01); H01L 24/85 (2013.01); H01L 25/00 (2013.01); H01L 25/50 (2013.01); H05K 3/46 (2013.01); H01L 24/48 (2013.01); H01L 2223/6611 (2013.01); H01L 2223/6616 (2013.01); H01L 2224/13111 (2013.01); H01L 2224/13116 (2013.01); H01L 2224/13139 (2013.01); H01L 2224/13147 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/014 (2013.01); H01L 2924/1517 (2013.01); H01L 2924/15311 (2013.01); H01L 2924/16195 (2013.01); H01L 2924/181 (2013.01); H01L 2924/19041 (2013.01); H01L 2924/19105 (2013.01);
Abstract

A semiconductor device includes a wiring substrate including wiring layers, a semiconductor chip including electrode pads and mounted on the wiring substrate, and a first capacitor including a first electrode and a second electrode, and mounted on the wiring substrate. The wiring layers include a first wiring layer including a first terminal pad electrically connected with the first electrode of the first capacitor and a second terminal pad electrically connected with the second electrode of the first capacitor; and a second wiring layer on an inner side by one layer from the first wiring layer of the wiring substrate and including a first conductor pattern having a larger area than each of the first terminal pad and the second terminal pad. The first conductor pattern includes a first opening in a region overlapping with each of the first terminal pad and the second terminal pad in the second wiring layer.


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