The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Mar. 04, 2015
Applicant:

Sandisk Technologies Llc, Plano, TX (US);

Inventors:

Dinesh Kumar Agarwal, Bangalore, IN;

Ramkumar Ramamurthy, Bangalore, IN;

Vijay Sivasankaran, Bangalore, IN;

Assignee:

SanDisk Technologies LLC, Plano, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/06 (2006.01); G06F 11/00 (2006.01); G11C 29/08 (2006.01); G11C 29/44 (2006.01); G11C 29/00 (2006.01); G11C 8/12 (2006.01); G11C 16/08 (2006.01); G11C 29/04 (2006.01);
U.S. Cl.
CPC ...
G06F 11/00 (2013.01); G11C 29/08 (2013.01); G11C 29/4401 (2013.01); G11C 29/76 (2013.01); G11C 8/12 (2013.01); G11C 16/08 (2013.01); G11C 2029/0409 (2013.01);
Abstract

In a non-volatile memory system, such as flash memory, when selecting a block for write operation, the system selects blocks from a free block list (FBL). The memory circuits of non-volatile systems often experience cluster failures, where multiple blocks of a physical region are bad. If the free block list is loaded with blocks from a region having a cluster failure, this can result in multiple back to back write errors. To help avoid this situation, the blocks of a memory array are divided into physical zones and, when selecting blocks to replenish the free block list, blocks are chosen cyclically from the zones.


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