The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 21, 2018

Filed:

Jul. 02, 2017
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Christopher M. Abernathy, Austin, TX (US);

Mary D. Brown, Austin, TX (US);

Susan E. Eisen, Round Rock, TX (US);

James A. Kahle, Austin, TX (US);

Hung Q. Le, Austin, TX (US);

Dung Q. Nguyen, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30101 (2013.01); G06F 9/3013 (2013.01); G06F 9/30123 (2013.01); G06F 9/384 (2013.01); G06F 9/3851 (2013.01); G06F 9/461 (2013.01);
Abstract

A system and process for managing thread transitions includes determining that a transition is to be made regarding the relative use of two data register sets where the two data register sets are used by a processor as first-level registers for thread execution. Based on the transition determination, a determination is made whether to move thread data in at least one of the first-level registers to second-level registers. Responsive to determining to move the thread data, a portion of main memory or cache memory is assigned as the second-level registers where the second-level registers serve as registers of at least one of the two data register sets for executing a thread. The thread data from the at least one first-level register is moved to the second-level registers based on the move determination.


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