The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2018
Filed:
Nov. 10, 2016
Applicant:
Texas Instruments Incorporated, Dallas, TX (US);
Inventor:
Gary L. Swoboda, Sugar Land, TX (US);
Assignee:
Texas Instruments Incorporated, Dallas, TX (US);
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/00 (2006.01); G06F 1/04 (2006.01); G06F 11/22 (2006.01); G01R 31/3177 (2006.01); G01R 31/3185 (2006.01); G01R 31/317 (2006.01); G06F 11/27 (2006.01); G06F 11/267 (2006.01); H04L 12/26 (2006.01); G06F 11/36 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01); G01R 31/31701 (2013.01); G01R 31/31713 (2013.01); G01R 31/31723 (2013.01); G01R 31/31727 (2013.01); G01R 31/318533 (2013.01); G01R 31/318538 (2013.01); G01R 31/318544 (2013.01); G06F 11/267 (2013.01); G06F 11/27 (2013.01); G06F 11/3656 (2013.01); G06F 2201/88 (2013.01); H04L 43/50 (2013.01);
Abstract
Control events may be signaled to a target system having a plurality of components coupled to a scan path by using the clock and data signals of the scan path. While the clock signal is held a high logic level, two or more edge transitions are detected on the data signal. The number of edge transitions on the data signal is counted while the clock signal is held at the high logic state. A control event is determined based on the counted number of edge transitions on the data signal after the clock signal transitions to the low logic state.