The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2018

Filed:

Apr. 02, 2015
Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventor:

Yoshikazu Katoh, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 13/00 (2006.01); G06F 21/31 (2013.01); G06F 21/73 (2013.01); G06F 21/79 (2013.01); G11C 11/56 (2006.01); H01L 45/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G06F 21/31 (2013.01); G06F 21/73 (2013.01); G06F 21/79 (2013.01); G11C 11/5685 (2013.01); G11C 13/0007 (2013.01); H01L 45/08 (2013.01); H01L 45/1233 (2013.01); H01L 45/146 (2013.01); G06F 2221/2107 (2013.01); G11C 2013/0083 (2013.01); G11C 2013/0095 (2013.01); G11C 2213/15 (2013.01);
Abstract

A data storing method comprises preparing a non-volatile memory device that includes a memory cell array including a plurality of memory cells, wherein the plurality of memory cells include a memory cell in an initial state, which does not change, unless a forming stress is applied thereto, to a variable state, in which a resistance value reversibly changes between a plurality of changeable resistance value ranges in accordance with an electric signal applied thereto; and applying the forming stress to the memory cell in the initial state, to store data in the memory cell array on the basis of whether each of the plurality of memory cells is in the initial state or the variable state.


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