The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2018

Filed:

Jul. 09, 2015
Applicant:

Atmel Corporation, San Jose, CA (US);

Inventors:

Laurentiu Birsan, Saint Herblain, FR;

Stein Danielsen, Flatasen, NO;

Assignee:

Atmel Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/17 (2006.01); G06F 13/42 (2006.01); H03K 19/177 (2006.01); G06F 13/00 (2006.01); G06F 13/40 (2006.01);
U.S. Cl.
CPC ...
G06F 13/4221 (2013.01); G06F 13/00 (2013.01); G06F 13/40 (2013.01); H03K 19/177 (2013.01); H03K 19/17704 (2013.01); H03K 19/17728 (2013.01); H03K 19/17736 (2013.01);
Abstract

Programmable logic units are described. A described unit includes one or more input interfaces to receive one or more input signals; logic elements that are individually programmable; one or more output interfaces to provide one or more output signals; and a programmable interconnect array that is configured to selectively form one or more interconnections within the unit based on one or more programming settings. The programmable interconnect array can be programmable to route the one or more input signals from the one or more input interfaces to at least a portion of the logic elements, programmable to route one or more intermediate signals among at least a portion of the logic elements, and programmable to route one or more signals from at least a portion of the logic elements to produce the one or more output signals via the output interface.


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