The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10048997 B1

PDF
Full Text
Expired
Date of Patent:
Aug. 14, 2018

Filed:

May. 04, 2016
Applicant:

Hamilton Sundstrand Corporation, Charlotte, NC (US);

Inventors:

Milorad Manojlovic, Loves Park, IL (US);

Christian Miller, Beloit, WI (US);

Assignee:

HAMILTON SUNDSTRAND CORPORATION, Charlotte, NC (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/07 (2006.01); G06F 1/32 (2006.01); G06F 1/30 (2006.01);
U.S. Cl.
CPC ...
G06F 11/079 (2013.01); G06F 1/30 (2013.01); G06F 1/3296 (2013.01); G06F 11/0721 (2013.01);
Abstract

A system for mitigating a solid state power controller (SSPC) open fault caused by single event latchup (SEL) on a power module includes a microprocessor in a control communication and power supply module (CCP) configured to determine whether communication with a microcontroller in at least one of a solid state power controller (SSPC) and a second SSPC in the power module is lost. The microprocessor in the CCP is operatively connected to the power module and configured to notify, via a backplane communication bus, the microcontroller on the power module that the communication with the SSPC in the power module is lost. The microcontroller in the SSPC is configured to set a low power operation of a second SSPC in the power module not affected by SEL in response to loss of reception of command messages from the microprocessor in the CCP.


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Manojlovic, Milorad. (2018). Single event latch up mitigation in solid state power controllers (U.S. Patent No. 10048997). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10048997

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