The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 14, 2018

Filed:

Aug. 11, 2016
Applicant:

Japan Display Inc., Tokyo, JP;

Inventors:

Tomonori Nishino, Tokyo, JP;

Syou Yanagisawa, Tokyo, JP;

Kentaro Agata, Tokyo, JP;

Hiroyuki Abe, Tokyo, JP;

Takayuki Suzuki, Tokyo, JP;

Assignee:

Japan Display Inc., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G02F 1/1333 (2006.01);
U.S. Cl.
CPC ...
G02F 1/136204 (2013.01); G02F 1/13458 (2013.01); G02F 1/133351 (2013.01);
Abstract

This invention envisages flexible wiring substrate terminals serving to connect with the wires for preventing dielectric breakdown caused by static electricity during the manufacturing process, and reducing the number of the flexible wiring substrate terminals. On a mother TFT substrate, signal lines extend over each liquid crystal cell in a manner flanking a scribe line between the adjacent liquid crystal cells. The signal lines of each liquid crystal cell are connected with connecting lines striding the scribe line. This reduces the number of static electricity countermeasure wires extending from the flexible wiring substrate terminals of each liquid crystal cell. Once completed, the individual liquid crystal cells are separated from one another, with no adverse effects caused by the connecting lines.


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