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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10043966 B1

PDFFull Text
Date of Patent:
Aug. 07, 2018

Filed:

Dec. 02, 2016

Semiconductor device including via plugs

Applicant:

Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;

Inventors:

Jung-hoon Bak, Suwon-si, KR;

Kyung-tae Nam, Suwon-si, KR;

Yong-jae Kim, Seoul, KR;

Da-hye Shin, Cheonan-si, KR;

Assignee:

Samsung Electronics Co., Ltd., Gyeonggi-do, KR;

Attorney:

Harness, Dickey & Pierce, P.L.C.

Primary Examiner:

Benjamin Sandvik

Assistant Examiner:

Farid Khan

Int. Cl.
CPC ...
H01L 43/02 (2006.01); H01L 27/22 (2006.01); H01L 43/08 (2006.01); H01L 43/10 (2006.01); H01L 43/12 (2006.01); H01L 21/768 (2006.01); H01L 21/8234 (2006.01); H01L 21/8238 (2006.01); H01L 23/522 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 43/02 (2013.01); H01L 21/768 (2013.01); H01L 21/823475 (2013.01); H01L 21/823871 (2013.01); H01L 23/522 (2013.01); H01L 23/5226 (2013.01); H01L 24/82 (2013.01); H01L 27/228 (2013.01); H01L 43/08 (2013.01); H01L 43/10 (2013.01); H01L 43/12 (2013.01);
Abstract

A semiconductor device includes a lower insulating layer on a substrate, a lower wiring layer extending on the lower insulating layer, a lower surface of at least a part of the lower wiring layer being covered by the lower insulating layer, a plurality of via plugs extending in a first direction on the lower wiring layer, the plurality of via plugs including a real via plug and a first dummy via plug connected to the part of the lower wiring layer covered by the lower insulating layer, and an upper wiring layer overlapping the lower wiring layer and extending in a second direction different from the first direction on the real via plug, the upper wiring layer not overlapping the dummy via plug.

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