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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10043877 B1

PDFFull Text
Date of Patent:
Aug. 07, 2018

Filed:

Feb. 15, 2017

Metal-insulator-semiconductor field effect transistor (misfet) device and method for manufacturing the same

Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventors:

Tsutomu Kiyosawa, Toyama, JP;

Yasuyuki Yanase, Osaka, JP;

Kazuhiro Kagawa, Kanagawa, JP;

Assignee:

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD., Osaka, JP;

Attorney:

McDermott Will & Emery LLP

Primary Examiner:

Thanh T Nguyen

Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/16 (2006.01); H01L 29/04 (2006.01); H01L 29/10 (2006.01); H01L 29/78 (2006.01); H01L 21/04 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 29/4236 (2013.01); H01L 21/049 (2013.01); H01L 29/045 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/66068 (2013.01); H01L 29/7813 (2013.01);
Abstract

A semiconductor device includes a substrate having a main surface inclined in an off-direction from a {0001} surface, a semiconductor layer, and an epitaxial layer. The semiconductor layer includes a trench. Where an upstream side is an off-angle upstream side and a downstream side is an off-angle downstream side in a direction with the off-direction projected on the main surface of the substrate, a side wall of the trench includes first and second side wall portions facing each other and each crossing the off-direction of the substrate. The first side wall portion is situated closer to the off-angle upstream side than the second side wall portion.

Find Patent Forward Citations

Kiyosawa, Tsutomu. (2018). Metal-insulator-semiconductor field effect transistor (misfet) device and method for manufacturing the same (U.S. Patent No. 10043877). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10043877

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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