The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 07, 2018

Filed:

Mar. 23, 2016
Applicant:

Taiyo Yuden Co., Ltd., Tokyo, JP;

Inventors:

Yuichi Sugiyama, Tokyo, JP;

Masashi Miyazaki, Tokyo, JP;

Yutaka Hata, Tokyo, JP;

Masashi Katakai, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/14 (2006.01); H01L 23/13 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/13 (2013.01); H01L 23/3121 (2013.01); H01L 23/49822 (2013.01); H01L 23/5389 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48465 (2013.01);
Abstract

An embedded component substrate includes: a core layer; a first electrode provided on a top surface of the core layer with a first insulating layer therebetween; and a second electrode provided on a bottom surface of the core layer with a second insulating layer therebetween, wherein a cavity is formed in the embedded component substrate from a top surface thereof to expose the second insulating layer at a bottom of the cavity, wherein a placement region is defined on the bottom of the cavity, for accommodating an electronic component; and wherein the embedded component substrate further includes a pad electrode on a portion of the second insulating layer, exposed by the cavity, surrounding the placement region located on the bottom of the cavity, the pad electrode vertically protruding from a top surface of the exposed second insulating layer upwardly and being configured to electrically connect to the electronic component.


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