The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2018
Filed:
Dec. 24, 2014
Celerint, Llc, New York, NY (US);
Howard Roberts, Jr., Austin, TX (US);
CELERINT, LLC, New York, NY (US);
Abstract
A method is provided for testing a semiconductor wafer, including individual semiconductor devices located on the semiconductor wafer, using temporary counterpart sacrificial bond pads. The method includes arranging individual semiconductor devices on the semiconductor wafer in a configuration having horizontal rows of the individual semiconductor devices separated by functional horizontal scribe lanes, and having vertical columns of individual semiconductor devices separated by functional vertical scribe lanes. The method includes creating the temporary counterpart sacrificial bond pads, located in the functional horizontal scribe lanes and/or vertical scribe lanes, that are electrically connected to corresponding normal individual bond pads located on individual semiconductor devices. The method also includes electrically testing the individual semiconductor devices using the temporary counterpart sacrificial bond pads, and destroying the temporary counterpart sacrificial bond pads upon completion of the electrical testing when the individual semiconductor devices are cut from the semiconductor wafer.