The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 07, 2018
Filed:
Feb. 21, 2017
Applicant:
Toshiba Memory Corporation, Minato-ku, Tokyo, JP;
Inventor:
Fumiyoshi Matsuoka, Kawasaki Kanagawa, JP;
Assignee:
TOSHIBA MEMORY CORPORATION, Tokyo, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/16 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/1675 (2013.01); G11C 11/00 (2013.01); G11C 11/165 (2013.01); G11C 11/1653 (2013.01); G11C 11/1655 (2013.01); G11C 11/1673 (2013.01); G11C 11/1693 (2013.01); G11C 11/1697 (2013.01); G11C 13/004 (2013.01); G11C 13/0021 (2013.01); G11C 13/0023 (2013.01); G11C 13/0026 (2013.01); G11C 13/0038 (2013.01); G11C 13/0061 (2013.01); G11C 13/0069 (2013.01); G11C 2013/0054 (2013.01);
Abstract
A semiconductor memory device includes a cell array including a plurality of memory cells; a sense amplifier reading data of the memory cell; write drivers writing data to the memory cell; a sub cell area including the cell array, the sense amplifier, and the write driver; a memory area including a plurality of sub cell areas; and a control circuit, when performing a first operation of supplying a first voltage to a selected sub cell area, supplying first write data to the sub cell area which performs the first operation, for selecting the sub cell area as a target of the first operation.