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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10042641 B1

PDFFull Text
Date of Patent:
Aug. 07, 2018

Filed:

Sep. 08, 2014

Method and apparatus for asynchronous processor with auxiliary asynchronous vector processor

Applicant:

Huawei Technologies Co. Ltd, Shenzhen, CN;

Inventors:

Qifan Zhang, Lachine, CA;

Wuxian Shi, Kanata Ottawa, CA;

Yiqun Ge, Ottawa, CA;

Tao Huang, Ottawa, CA;

Wen Tong, Ottawa, CA;

Assignee:

Huawei Technologies Co., Ltd., Shenzhen, CN;

Attorney:

Slater Matsil, LLP

Primary Examiner:

Yuqing Xiao

Int. Cl.
CPC ...
G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 15/80 (2006.01); G06F 1/08 (2006.01); G06F 1/10 (2006.01); G06F 9/50 (2006.01);
U.S. Cl.
CPC ...
G06F 9/30145 (2013.01); G06F 1/08 (2013.01); G06F 1/10 (2013.01); G06F 9/30036 (2013.01); G06F 9/3826 (2013.01); G06F 9/3828 (2013.01); G06F 9/3851 (2013.01); G06F 9/3853 (2013.01); G06F 9/3871 (2013.01); G06F 9/3877 (2013.01); G06F 9/3885 (2013.01); G06F 9/3889 (2013.01); G06F 9/3891 (2013.01); G06F 9/5011 (2013.01); G06F 15/8053 (2013.01); G06F 15/8092 (2013.01); G06F 15/8007 (2013.01); G06F 2009/3883 (2013.01);
Abstract

An asynchronous processing system comprising an asynchronous scalar processor and an asynchronous vector processor coupled to the scalar processor. The asynchronous scalar processor is configured to perform processing functions on input data and to output instructions. The asynchronous vector processor is configured to perform processing functions in response to a very long instruction word (VLIW) received from the scalar processor. The VLIW comprises a first portion and a second portion, at least the first portion comprising a vector instruction.

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