The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 31, 2018

Filed:

Jun. 01, 2017
Applicant:

Marvell International Ltd., Hamilton, BM;

Inventors:

Peter Lee, Pleasanton, CA (US);

Moon-Hae Son, San Jose, CA (US);

Xinghui Guo, Alhambra, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/406 (2006.01); G06F 13/16 (2006.01); G11C 7/10 (2006.01); G06F 15/167 (2006.01); G06F 11/16 (2006.01); G11C 8/16 (2006.01);
U.S. Cl.
CPC ...
G06F 13/1663 (2013.01); G06F 11/1658 (2013.01); G06F 15/167 (2013.01); G11C 7/1075 (2013.01); G11C 8/16 (2013.01); G11C 11/406 (2013.01);
Abstract

A dual-port memory including a first memory array and at least one address decoder. The first memory array includes memory cells and two ports for each of the memory cells. The at least one address decoder generates word line signals for concurrent access to two ports of one or more cells of the memory cells in a same row of the first memory array. Each of the word line signals is generated to perform a read operation. Pulse widths of the word line signals for the read operations are proportional to a ratio of (i) a reference amount of cell current of a cell of a reference memory array to (ii) an amount of cell current of the one or more cells of the plurality of memory cells in a same row of the first memory array.


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