The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 31, 2018
Filed:
Dec. 04, 2014
Applicant:
Arm Limited, Cambridge, GB;
Inventors:
Gregory Munson Yeric, Austin, TX (US);
Vikas Chandra, San Jose, CA (US);
Assignee:
ARM Limited, Cambridge, GB;
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R 31/00 (2006.01); G01R 31/28 (2006.01); H01L 21/66 (2006.01); H01L 25/065 (2006.01);
U.S. Cl.
CPC ...
G01R 31/2855 (2013.01); G01R 31/2856 (2013.01); H01L 22/30 (2013.01); H01L 25/0657 (2013.01); H01L 22/34 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/73204 (2013.01); H01L 2225/06541 (2013.01); H01L 2225/06589 (2013.01); H01L 2225/06596 (2013.01); H01L 2924/0002 (2013.01);
Abstract
An integrated circuit device has at least one environment-hardened die and at least one less-environment-hardened die. Environment-hardened circuitry on the environment-hardened die is more resistant to the degradation when exposed to a predetermined environmental condition than the less-environment-hardened circuitry on the environment-hardened die. The dice are combined using a 3D or 2.5D integrated circuit technology. This is very useful for testing circuits at adverse environmental conditions (e.g. high temperature), or for providing circuits to operate at such conditions.