The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2018

Filed:

Oct. 16, 2013
Applicant:

Hitachi, Ltd., Chiyoda-ku, Tokyo, JP;

Inventors:

Yusuke Kanno, Tokyo, JP;

Takeshi Sakata, Tokyo, JP;

Nobuyasu Kanekawa, Tokyo, JP;

Assignee:

Hitachi, Ltd., Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/037 (2006.01); H03K 19/23 (2006.01); H03K 3/3562 (2006.01); H03K 19/0948 (2006.01); H03K 19/177 (2006.01); H03K 19/20 (2006.01);
U.S. Cl.
CPC ...
H03K 3/0375 (2013.01); H03K 3/0372 (2013.01); H03K 3/35625 (2013.01); H03K 19/0948 (2013.01); H03K 19/17724 (2013.01); H03K 19/17728 (2013.01); H03K 19/20 (2013.01); H03K 19/23 (2013.01);
Abstract

Provided is a semiconductor device capable of reducing a penalty associated with ensuring reliability. The semiconductor device includes a latch circuit which has input/output paths of three systems or more independent from each other. The latch circuit includes a plurality of storage elements STEto STEwhich are provided on the input/output paths of the three systems or more, respectively, and hold input data in synchronization with a clock signal. At least one storage element (for example, STE) of the plurality of storage elements STEto STEincludes a majority decision unit (for example,) executing a majority decision using data from the storage elements provided on other input/output paths different from the input/output path thereof and outputs data in which a result of the majority decision is reflected.


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