The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2018

Filed:

Jul. 08, 2016
Applicants:

Boe Technology Group Co., Ltd., Beijing, CN;

Chongqing Boe Optoelectronics Technology Co., Ltd., Chongqing, CN;

Inventors:

Jaemoon Chung, Beijing, CN;

Dongzhen Jin, Beijing, CN;

Chao Fan, Beijing, CN;

Rongge Cui, Beijing, CN;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/786 (2006.01); H01L 51/05 (2006.01); H01L 27/28 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/786 (2013.01); H01L 27/1222 (2013.01); H01L 27/1259 (2013.01); H01L 27/283 (2013.01); H01L 51/0545 (2013.01);
Abstract

The present application discloses a thin film transistor including a base substrate; an active layer on the base substrate having a first semiconductor region, a second semiconductor region, and a plurality of semiconductor bridges each of which connecting the first semiconductor region and the second semiconductor region; the plurality of semiconductor bridges spaced apart from each other; the active layer being made of a material including M1ON, wherein M1 is a single metal or a combination of metals, a>0, and b≥0; an etch stop layer on a side of the active layer distal to the base substrate; the first semiconductor region having a first non-overlapping portion, a projection of which is outside that of the etch stop layer in plan view of the base substrate; the second semiconductor region having a second non-overlapping portion, a projection of which is outside that of the etch stop layer in plan view of the base substrate; a first electrode on a side of the first non-overlapping portion distal to the base substrate; and a second electrode on a side of the second non-overlapping portion distal to the base substrate.


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