The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10032785 B1

Date of Patent:

Jul. 24, 2018

Filed:

Aug. 26, 2016

Semiconductor device and method of manufacturing semiconductor device

Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Hiroyasu Kitajima, Ibaraki, JP;

Assignee:

Renesas Electronics Corporation, Koutou-ku, Tokyo, JP;

Attorney:

Sughrue Mion, PLLC

Primary Examiner:

Sitaramarao S Yechuri

Int. Cl.

CPC ...

H01L 29/788 (2006.01); H01L 27/11524 (2017.01); H01L 29/423 (2006.01); H01L 21/28 (2006.01); H01L 29/66 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01);

U.S. Cl.

CPC ...

H01L 27/11524 (2013.01); H01L 21/28273 (2013.01); H01L 21/32133 (2013.01); H01L 21/76895 (2013.01); H01L 29/42328 (2013.01); H01L 29/66553 (2013.01);

Abstract

A pair of floating gates disposed to be spaced apart from each other by a first distance and a pair of spacer insulating films disposed on each of the pair of floating gates are provided in a memory region. Also, a pair of floating gates disposed to be spaced apart from each other by a second distance and a pair of spacer insulating films disposed on each of the pair of floating gates are provided in a monitor region. Then, the second distance is smaller than the first distance. Thus, by narrowing a distance between the floating gates in the monitor region, a tapered portion can be provided on a side surface portion of the floating gate in the monitor region. Then, by checking this tapered portion, it is possible to understand the shape of the floating gate in the memory region.

Find Patent Forward Citations

Kitajima, Hiroyasu. (2018). Semiconductor device and method of manufacturing semiconductor device (U.S. Patent No. 10032785). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10032785

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