The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2018
Filed:
Feb. 02, 2017
Applicant:
Johnson Electric S.a., Murten, CH;
Inventors:
Assignee:
Johnson Electric S.A., Murten, CH;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); G06K 19/077 (2006.01); H01L 23/544 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49838 (2013.01); G06K 19/077 (2013.01); H01L 23/49855 (2013.01); H01L 23/544 (2013.01); H01L 23/4985 (2013.01); H01L 24/16 (2013.01); H01L 24/32 (2013.01); H01L 24/48 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/26175 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81132 (2013.01); H01L 2224/83132 (2013.01); H01L 2924/15192 (2013.01);
Abstract
A circuit board and a smart card module and a smart card employing the circuit board are provided. The circuit board includes a substrate and a pad region provided on the substrate. The pad region is configured for mounting an electronic component, and comprises a plurality of pads spaced from each other and traces connected to their respective pads. At least one of the pads has an arc edge. In the present invention, the distance between the pads is easy to be controlled during fabrication, and the stability of the adhesion between the chip and pad region is enhanced.