The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2018
Filed:
Apr. 28, 2017
Applicant:
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Inventor:
Yeonghun Lee, Seongnam-si, KR;
Assignee:
SK hynix Inc., Icheon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/16 (2006.01); G06F 3/06 (2006.01); G11C 16/26 (2006.01); G11C 16/08 (2006.01); G11C 16/34 (2006.01);
U.S. Cl.
CPC ...
G11C 16/16 (2013.01); G06F 3/0608 (2013.01); G06F 3/0652 (2013.01); G06F 3/0679 (2013.01); G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/349 (2013.01);
Abstract
A semiconductor memory device includes a memory cell array including a plurality of memory cells, a peripheral circuit performing a program operation or erase operation of the memory cell array, and a control logic controlling the peripheral circuit. The control logic controls the peripheral circuit such that a first program allowable voltage applied to bit lines of the memory cell array during a first program operation of the program operation and a second program allowable voltage applied during a second program operation of the program operation are different from each other.