The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 24, 2018
Filed:
May. 01, 2015
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventors:
Assignee:
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 12/0855 (2016.01); G06F 12/0862 (2016.01); G06F 12/084 (2016.01); G06F 12/0846 (2016.01); G06F 12/0811 (2016.01); G06F 12/0888 (2016.01); G06F 12/0817 (2016.01);
U.S. Cl.
CPC ...
G06F 12/0855 (2013.01); G06F 12/084 (2013.01); G06F 12/0811 (2013.01); G06F 12/0846 (2013.01); G06F 12/0862 (2013.01); G06F 12/0888 (2013.01); G06F 12/0817 (2013.01); G06F 2212/1016 (2013.01); G06F 2212/1021 (2013.01); G06F 2212/1041 (2013.01); G06F 2212/283 (2013.01); G06F 2212/452 (2013.01); G06F 2212/6028 (2013.01); G06F 2212/6046 (2013.01); Y02D 10/13 (2018.01);
Abstract
Data can be stored in a multi-level cache hierarchy memory system by, for example, storing valid data associated with a cacheline in a primary location in a first cache memory location. The first cache memory also stores location information about an alternative location in a second cache memory associated with the cacheline. Space is allocated in the alternative location of the second cache memory to store data associated with the cacheline.