The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 24, 2018

Filed:

Mar. 24, 2014
Applicant:

Scientia Sol Mentis Ag, Schindellegi, CH;

Inventors:

Martin Vorbach, Lingenfeld, DE;

Frank May, Munich, DE;

Markus Weinhardt, Munich, DE;

Joao Manuel Paiva Cardoso, Vila Nova de Paiva, PT;

Assignee:

Scientia Sol Mentis AG, Schindellegi, CH;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/78 (2006.01); G06F 8/41 (2018.01); G06F 15/167 (2006.01);
U.S. Cl.
CPC ...
G06F 8/45 (2013.01); G06F 15/167 (2013.01); G06F 15/7867 (2013.01);
Abstract

A method for operating a system on a chip comprising a conventional processor unit (CISC, RISC, VLIW, DSP) and an array processor having a multidimensional arrangement of arithmetic units. Operation information for the array processor are stored in a memory shared between the conventional processor and the array processor. At runtime the conventional processor points the array processor to the memory area comprising the operation information. A management unit inside the array processor is autonomously loading the operation information into the array processor.


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