The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2018
Filed:
Sep. 07, 2016
Applicant:
Mediatek Inc., Hsin-Chu, TW;
Inventors:
Wen-Chieh Wang, Tainan, TW;
Yu-Hsin Lin, Taipei, TW;
Assignee:
MEDIATEK INC., Hsin-Chu, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 3/185 (2006.01); H03F 3/217 (2006.01); H03F 1/34 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45645 (2013.01); H03F 1/342 (2013.01); H03F 3/185 (2013.01); H03F 3/217 (2013.01); H03F 3/2171 (2013.01); H03F 3/45479 (2013.01); H03F 1/34 (2013.01); H03F 3/2173 (2013.01); H03F 2200/165 (2013.01); H03F 2200/351 (2013.01); H03F 2200/555 (2013.01); H03F 2203/45418 (2013.01); H03F 2203/45424 (2013.01); H03F 2203/45434 (2013.01); H03F 2203/45438 (2013.01); H03F 2203/45441 (2013.01);
Abstract
A class-D amplifier includes a loop filter, a pulse-width modulation (PWM) circuit, an output circuit, and a common-mode control circuit. The loop filter receives an input signal of the class-D amplifier to generate a filtered signal. The PWM circuit converts a non-PWM signal into a PWM signal, wherein the non-PWM signal is derived from at least the filtered signal. The output circuit generates an output signal of the class-D amplifier according to the PWM signal. The common-mode control circuit monitors a common-mode level of the output signal to generate a common-mode control signal for PWM common-mode control.