The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2018

Filed:

Nov. 15, 2011
Applicants:

Brendan Toner, Dungiven, IE;

Tsui Ping Chu, Kuching, CN;

Foo Sen Liew, Kuching, MY;

Inventors:

Brendan Toner, Dungiven, IE;

Tsui Ping Chu, Kuching, CN;

Foo Sen Liew, Kuching, MY;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/088 (2006.01); H01L 21/8234 (2006.01); H01L 27/02 (2006.01); H03F 1/32 (2006.01); H01L 21/02 (2006.01); H01L 21/28 (2006.01); H01L 29/08 (2006.01); H01L 29/423 (2006.01); H01L 29/49 (2006.01); H01L 29/51 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/02068 (2013.01); H01L 21/02238 (2013.01); H01L 21/28035 (2013.01); H01L 21/823425 (2013.01); H01L 21/823456 (2013.01); H01L 27/0207 (2013.01); H01L 29/0847 (2013.01); H01L 29/42364 (2013.01); H01L 29/42376 (2013.01); H01L 29/4916 (2013.01); H01L 29/51 (2013.01); H03F 1/3205 (2013.01); H01L 21/823462 (2013.01);
Abstract

A MOS device assembly having at least two transistors, each transistor having a gate region. The dimensions of the gate region of the first transistor are different from the dimensions of the gate region of the second transistor. The transconductance of the MOS device assembly is substantially uniform when the gate regions of the first and second transistors are biased using the same voltage.


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