The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2018

Filed:

Jul. 28, 2014
Applicant:

Sandia Corporation, Albuquerque, NM (US);

Inventors:

Christopher T. Rodenbeck, Albuquerque, NM (US);

Kenneth A. Peterson, Albuquerque, NM (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/66 (2006.01); H01L 21/56 (2006.01); H01L 23/552 (2006.01);
U.S. Cl.
CPC ...
H01L 23/66 (2013.01); H01L 21/563 (2013.01); H01L 23/552 (2013.01); H01L 2223/6616 (2013.01);
Abstract

The various technologies presented herein relate to isolating an integrated circuit from electromagnetic radiation/interference. The integrated circuit can be encapsulated in a coating (e.g., a conformal coating). A conductive layer can be formed over the coating, where the conductive layer is deposited to connect with an electromagnetic shielding layer included in a substrate upon which the integrated circuit is located thereby forming a Faraday cage around the integrated circuit. Hollow spheres can be included in the coating to improve the dielectric constant of the coating. The conductive layer can be formed from at least one of metallic material or a polymer coating which includes conductive material. The integrated circuit can be utilized in conjunction with a heat sink and further, the integrated circuit can be of a flip chip configuration.


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