The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2018

Filed:

Feb. 24, 2017
Applicant:

Synaptics Japan Gk, Tokyo, JP;

Inventors:

Atsushi Obuchi, Tokyo, JP;

Takashi Yoneoka, Tokyo, JP;

Hiroshi Kaga, Tokyo, JP;

Assignee:

Synaptics Japan GK, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 23/58 (2006.01); H01L 21/78 (2006.01); H01L 21/66 (2006.01); H01L 23/482 (2006.01); H01L 23/485 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/585 (2013.01); H01L 21/78 (2013.01); H01L 22/32 (2013.01); H01L 23/485 (2013.01); H01L 23/4827 (2013.01); H01L 24/05 (2013.01); H01L 24/11 (2013.01); H01L 24/13 (2013.01); H01L 23/564 (2013.01); H01L 2224/0215 (2013.01); H01L 2224/0219 (2013.01); H01L 2224/0226 (2013.01); H01L 2224/02141 (2013.01); H01L 2224/02181 (2013.01); H01L 2224/02251 (2013.01); H01L 2224/03826 (2013.01); H01L 2224/03912 (2013.01); H01L 2224/03914 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/05082 (2013.01); H01L 2224/05096 (2013.01); H01L 2224/05124 (2013.01); H01L 2224/1146 (2013.01); H01L 2224/1147 (2013.01); H01L 2224/13144 (2013.01); H01L 2924/04941 (2013.01);
Abstract

A large scale integrated circuit chip includes a semiconductor circuit having a multilayered wiring structure, a metal guard ring surrounding the semiconductor circuit, and a plurality of external connection terminals, on a semiconductor circuit. The plurality of external connection terminals connect to an uppermost-layer wiring of the multilayered wiring structure and are exposed on a surface of the large scale integrated circuit chip. A predetermined external connection terminal conducts to a predetermined wiring through a conductive via within the guard ring and conducts to a conductive piece through another conductive via outside the guard ring. One side of the external connection terminal extending over the guard ring connects to the conductive piece, and the other side of the external connection terminal connects to the uppermost-layer wiring within the guard ring. Thus, a cutout part is not necessary in the guard ring.


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