The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2018

Filed:

Jul. 07, 2017
Applicant:

Sony Semiconductor Solutions Corporation, Kanagawa, JP;

Inventors:

Noam Eshel, Pardesia, IL;

Golan Zeituni, Kfar-Saba, IL;

Zvika Lupu, Haifa, IL;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 27/02 (2006.01);
U.S. Cl.
CPC ...
G11C 27/02 (2013.01);
Abstract

A sample-and-hold circuit includes a first transistor; a second transistor disposed between a gate electrode and a drain electrode of the first transistor; a sampling capacitor, an electrode of the sampling capacitor being connected to the gate electrode of the first transistor; and a first current source connected to the drain electrode of the first transistor, where a gate electrode of the second transistor receives a gate control signal. A minimum voltage of the gate control signal is V+V+V+V, where Vis a threshold voltage of the first transistor, Vis a saturation voltage of the first transistor, Vis a threshold voltage of the second transistor, and Vis a saturation voltage of the second transistor.


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