The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 17, 2018

Filed:

Mar. 01, 2017
Applicant:

Toshiba Memory Corporation, Tokyo, JP;

Inventors:

Yuko Utsunomiya, Yokohama Kanagawa, JP;

Takahiro Shimizu, Yokohama Kanagawa, JP;

Yoshihiko Shindo, Fujisawa Kanagawa, JP;

Akio Sugahara, Yokohama Kanagawa, JP;

Toshio Yamamura, Fujisawa Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/10 (2006.01); G11C 16/34 (2006.01); G11C 16/04 (2006.01); G11C 16/26 (2006.01); G11C 16/10 (2006.01); G06F 3/06 (2006.01); G06F 11/14 (2006.01);
U.S. Cl.
CPC ...
G11C 16/3459 (2013.01); G06F 3/065 (2013.01); G06F 3/067 (2013.01); G06F 3/0619 (2013.01); G06F 11/1451 (2013.01); G06F 11/1469 (2013.01); G11C 16/0483 (2013.01); G11C 16/10 (2013.01); G11C 16/26 (2013.01); G06F 2201/84 (2013.01);
Abstract

A semiconductor memory device includes memory cells, a sense amplifier unit including a first latch circuit, and a control unit configured to execute read and write operations on the memory cells. The control unit, while executing the write operation on the memory cells, responsive to a write suspend command followed by a read command, performs a data saving operation, the read operation, and a data restoring operation prior to resuming the write operation. The data saving operation includes transferring first data stored in the first latch circuit to an external device, the first data including at least a result of verify operation performed on the memory cells. The data restoring operation includes transferring the first data to the first latch circuit.


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