The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 17, 2018
Filed:
May. 30, 2014
Arman Hajati, Santa Clara, CA (US);
Deane Gardner, Cupertino, CA (US);
Christopher M. Daft, Dublin, CA (US);
Arman Hajati, Santa Clara, CA (US);
Deane Gardner, Cupertino, CA (US);
Christopher M. Daft, Dublin, CA (US);
FUJIFILM DIMATIX, INC., Lebanon, NH (US);
Abstract
In an embodiment, a tile device includes a plurality of piezoelectric transducers elements and a base adjoining and supporting the plurality of piezoelectric transducers elements. The base includes integrated circuitry programmed to successively configure operational modes of the tile, according to a pre-programmed sequence, to successively select respective subsets of the piezoelectric transducers elements for activation. The integrated circuitry includes pulser logic to selectively activate such subsets, and demultiplexer logic to communicate from the tile sense signals resulting from such activation. In another embodiment, the demultiplexer logic is part of a first voltage domain of the tile, and the pulser logic is part of a second voltage domain of the tile. The base may include circuitry to protect the demultiplexer logic from a relatively high voltage level of the second voltage domain.