The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2018
Filed:
Mar. 08, 2017
Qualcomm Incorporated, San Diego, CA (US);
Kevin Bowles, Mission Viejo, CA (US);
Dipti Ranjan Pal, Irvine, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A clock signal generator including a fractional clock divider and a frequency ramp control circuit. The fractional clock divider is configured to generate an output clock signal with a frequency being a divider ratio multiplied by a frequency of an input clock signal. The frequency ramp control circuit is configured to provide the fractional clock divider a set of divider ratios so that the frequency of the output clock signal is ramped in steps from a current frequency to a target frequency. The frequency ramp control circuit is configured to produce frequency change steps each having substantially the same duration. The frequency ramp control circuit is also configured to provide the set of divider ratios such as a first portion of the frequency ramp is performed using coarse frequency changes and a second portion of the ramp is performed using at least one fine frequency change.