The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2018
Filed:
Dec. 10, 2015
Applicant:
Analog Devices, Inc., Norwood, MA (US);
Inventors:
Peter J. Katzin, Arlington, MA (US);
Haoyang Yu, Lexington, MA (US);
Guogong Wang, Chelmsford, MA (US);
Assignee:
Analog Devices, Inc., Norwood, MA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/193 (2006.01); H03F 1/02 (2006.01);
U.S. Cl.
CPC ...
H03F 1/0205 (2013.01); H03F 1/0272 (2013.01); H03F 3/193 (2013.01); H03F 3/1935 (2013.01); H03F 2200/102 (2013.01); H03F 2200/129 (2013.01); H03F 2200/144 (2013.01); H03F 2200/153 (2013.01); H03F 2200/18 (2013.01); H03F 2200/451 (2013.01);
Abstract
Provided herein are apparatus and methods for power enhancement of self-biased distributed amplifiers with gate bias networks. By sampling output power a gate bias network with a filter network can adjust gate bias so as to improve the P1 dB compression point and the Psat saturation power level of a self-biased distributed amplifier. Advantageously the filter network can be derived using passive components thereby making it an easy to implement and cost effective approach to improve linearity and output power.