The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2018

Filed:

Dec. 19, 2017
Applicant:

Lsis Co., Ltd., Anyang-si, Gyeonggi-do, KR;

Inventors:

Jae-Moon Lee, Anyang-si, KR;

Chun-Suk Yang, Anyang-si, KR;

Assignee:

LSIS CO., LTD., Anyang-si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 7/5395 (2006.01); H02M 1/32 (2007.01); H02P 27/08 (2006.01); H02M 5/458 (2006.01);
U.S. Cl.
CPC ...
H02M 1/32 (2013.01); H02M 5/4585 (2013.01); H02M 7/5395 (2013.01); H02P 27/08 (2013.01);
Abstract

Disclosed herein is a method for controlling an inverter. The method includes calculating a maximum current from an output current of each phase of the inverter; determining a variable level upper limit by performing a DQ conversion for the output current of each phase of the inverter and adding a change allowable value to the DQ converted output current; determining a difference between the maximum current for each phase and the variable level upper limit as an output frequency attenuation variation, when the output current of the inverter arrives at the variable level upper limit; and determining an output frequency based on the output frequency attenuation variation.


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