The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2018

Filed:

Jun. 24, 2015
Applicant:

Soitec, Crolles, FR;

Inventors:

Fred Newman, Seattle, WA (US);

Frank Reinhardt, Glencoe, MO (US);

Chantal Arena, Mesa, AZ (US);

Assignee:

SOITEC, Bernin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/06 (2012.01); H01L 31/04 (2014.01); H01L 31/18 (2006.01); H01L 31/0687 (2012.01); H01L 31/0693 (2012.01); H01L 31/0304 (2006.01); H01L 31/043 (2014.01);
U.S. Cl.
CPC ...
H01L 31/0687 (2013.01); H01L 31/03042 (2013.01); H01L 31/03046 (2013.01); H01L 31/03048 (2013.01); H01L 31/043 (2014.12); H01L 31/0693 (2013.01); H01L 31/184 (2013.01); H01L 31/1844 (2013.01); H01L 31/1852 (2013.01); H01L 31/1892 (2013.01); Y02E 10/544 (2013.01);
Abstract

A method of fabricating a semiconductor structure includes the formation of a first bonding layer at least substantially comprised of a first III-V material on a major surface of a first element, and formation of a second bonding layer at least substantially comprised of a second III-V material on a major surface of a second element. The first bonding layer and the second bonding layer are disposed between the first element and the second element, and the first element and the second element are attached to one another at a bonding interface disposed between the first bonding layer and the second bonding layer. Semiconductor structures are fabricated using such methods.


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