The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 03, 2018
Filed:
Feb. 24, 2017
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Inventors:
Min-Chul Sun, Seoul, KR;
Byung-Gook Park, Hwasung, KR;
Assignees:
Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-do, KR;
Seoul National University R & DB Foundation, Seoul, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 21/8234 (2006.01); H01L 29/06 (2006.01); H01L 29/786 (2006.01); H01L 29/78 (2006.01); H01L 27/088 (2006.01); H01L 21/02 (2006.01); H01L 21/3065 (2006.01);
U.S. Cl.
CPC ...
H01L 21/823412 (2013.01); H01L 21/02532 (2013.01); H01L 21/02647 (2013.01); H01L 21/3065 (2013.01); H01L 27/088 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/7843 (2013.01); H01L 29/78651 (2013.01); H01L 29/78696 (2013.01);
Abstract
A semiconductor device includes a structure on a substrate and a plurality of gate-all-around devices on the structure. The structure includes a plurality of sacrificial layers and a plurality of active layers alternately stacked on one another. The sacrificial layers have different widths and the active layers have different widths to form multiple stepped layers on the substrate. The gate-all-around devices are on respective ones the multiple stepped layers.