The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 03, 2018

Filed:

Aug. 12, 2015
Applicant:

Lapis Semiconductor Co., Ltd., Kanagawa, JP;

Inventor:

Yoshikatsu Matsuo, Kanagawa, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01N 27/416 (2006.01); G11C 8/18 (2006.01); G01R 31/36 (2006.01); G11C 5/14 (2006.01); G11C 8/12 (2006.01);
U.S. Cl.
CPC ...
G11C 8/18 (2013.01); G01R 31/3658 (2013.01); G11C 5/141 (2013.01); G11C 5/143 (2013.01); G11C 8/12 (2013.01);
Abstract

A semiconductor device, which is daisy-chain connected with other semiconductor devices, includes a first communication section that receives reception data; a determining section that determines a type of the reception data, and that outputs a first and a second control signal according to the determination; a setting processing section that sets an address value based on the reception data and the second control signal, and that outputs a third control signal according to the setting of the address value; and a second communication section that includes a first input terminal to which the reception data is input, and an output terminal to which a communication line, that transmits transmission data to the other semiconductor devices, is connected, and that causes the first input terminal and the output terminal to be in connected or non-connected state based on the first or the third control signal.


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Matsuo, Yoshikatsu. (2018). Semiconductor device, battery monitoring system, and address setting method of semiconductor device (U.S. Patent No. 10014044). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10014044

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