The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 26, 2018

Filed:

Apr. 20, 2017
Applicant:

Nxp B.v., Eindhoven, NL;

Inventor:

Chung Hsiung Ho, Kaohsiung, TW;

Assignee:

NXP B.V., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/52 (2006.01); H01L 23/552 (2006.01); H01L 23/31 (2006.01); H01L 23/00 (2006.01); H01L 21/78 (2006.01); H01L 21/48 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 21/4817 (2013.01); H01L 21/6835 (2013.01); H01L 21/78 (2013.01); H01L 23/3128 (2013.01); H01L 24/03 (2013.01); H01L 24/06 (2013.01); H01L 24/11 (2013.01); H01L 2224/0401 (2013.01);
Abstract

A semiconductor device includes a semiconductor die having a top side and a bottom, active side. During assembly of the semiconductor device, a metal film is sputtered over the top and side surfaces of the die, and then a mold compound is formed over the metal film. The metal film can provide both heat dissipation and EMI shielding. The device may be assembled using a wafer level assembly process.


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