The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2018

Filed:

Apr. 07, 2017
Applicant:

Fuji Electric Co., Ltd., Kawasaki-shi, JP;

Inventor:

Shogo Ogawa, Matsumoto, JP;

Assignee:

FUJI ELECTRIC CO., LTD., Kawasaki-Shi, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02M 7/537 (2006.01); H02M 7/00 (2006.01); H02M 7/487 (2007.01); H01L 25/07 (2006.01); H01L 25/18 (2006.01); H01L 25/11 (2006.01); H01L 29/739 (2006.01); H01L 29/861 (2006.01);
U.S. Cl.
CPC ...
H02M 7/537 (2013.01); H01L 25/072 (2013.01); H01L 25/115 (2013.01); H01L 25/18 (2013.01); H01L 29/7393 (2013.01); H01L 29/861 (2013.01); H02M 7/003 (2013.01); H02M 7/487 (2013.01);
Abstract

A semiconductor module, an upper and lower arm kit, and a three-level inverter can be provided at low cost and with broad current ratings and voltage ratings using existing packages, without developing new packages. A first semiconductor module on an upper arm side and a second semiconductor module on a lower arm side are made using an existing package, and the semiconductor modules and are used to configure an upper and lower arm kit. Further, the upper and lower arm kit is used to configure a three-level inverter. These devices can be formed using existing packages, and semiconductor modules, the upper and lower arm kit, and the three-level inverter can be therefore provided at low cost and with broad current ratings and voltage ratings.


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