The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 19, 2018
Filed:
Jul. 15, 2014
Proplus Electronics Co., Ltd., Jinan, CN;
Bruce W. McGaughy, Pleasanton, CA (US);
Zhenzhong Zhang, Beijing, CN;
Jun Fang, Beijing, CN;
Xinjun Niu, Beijing, CN;
PROPLUS DESIGN SOLUTIONS, INC., San Jose, CA (US);
Abstract
Methods and systems are disclosed related to region based device bypass in circuit simulation. In one embodiment, a computer implemented method of performing region based device bypass in circuit simulation includes receiving a subcircuit for simulation, where the subcircuit includes a plurality of devices, and determining node tolerance of the plurality of devices. The computer implemented method further comprises for each device in the plurality of devices, determining whether the device has entered into a bypass region using the node tolerance of the plurality of devices, performing model evaluation in response to the device has not entered the bypass region, and skipping model evaluation in response to the device has entered the bypass region.