The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 19, 2018

Filed:

Oct. 12, 2016
Applicant:

Cavium, Inc., San Jose, CA (US);

Inventors:

Shahid Ikram, Shrewsbury, MA (US);

James Ellis, Hubbardston, MA (US);

Assignee:

Cavium, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 17/00 (2006.01); G06F 17/50 (2006.01);
U.S. Cl.
CPC ...
G06F 17/504 (2013.01);
Abstract

A new approach is proposed that contemplates systems and methods to support dynamic regression test generation for an IC design based upon coverage-based clustering of RTL modules in the design. First, coverage data for code coverage by a plurality of RTL modules in the IC design are collected and a plurality of clusters of related RTL modules of the IC design are generated based on statistical analysis of the collected coverage data and hierarchal information of the RTL modules. When changes are made to the RTL modules during the IC design process, a plurality of affected RTL modules are identified based on the clusters of the RTL modules and a plurality of regression tests are generated dynamically for these affected RTL modules based on their corresponding coverage data. The dynamically generated regression tests are then run to verify the changes made in the IC design.


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